about making makefile
 

I have a couple of C programs, and I wonder what are people's usesage of makefile.

My compilers are cc, gcc.

For detail, I have five files.

main.c main.h

file2.c file2.h

file3.c file3.h

file4.c file4.h

file5.c file5.h

These files are interconnected, that is they are using each other's function definitions.

what are possible makefile forms?

Thanks in advance.

Re: about making makefile
 

This is in no way related to CFD. But here is an exemple of a simple makefile:

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CC= gcc STD= _GNU_SOURCE DEBUG= -O2 OBJS=\ dos_cvrt.o\ unix2dos.o\ dos2unix.o\ put_ch.o

.c.o:

$(CC) -c $(DEBUG) -Wall -D$(STD) $<

all: dos_cvrt unix_cvrt

dos_cvrt: $(OBJS)

$(CC) $(OBJS) -o dos_cvrt

unix_cvrt : dos_cvrt

rm -f unix_cvrt

ln dos_cvrt unix_cvrt

clean:

rm -f *.o *.core

clobber:

rm -f *.o *.core dos_cvrt unix_cvrt

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